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19-2751; Rev 2; 1/10
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface
General Description
The MAX4820/MAX4821 8-channel relay drivers offer built-in kickback protection and drive +3.3V/+5V nonlatching or dual-coil-latching relays. These devices are especially useful when driving +3V relays. Each independent open-drain output features a 2 on-resistance and is guaranteed to sink 70mA (min) of load current. Both devices consume less than 50A (max) quiescent current and have 1A output off-leakage current. The MAX4820 features an SPITM-/QSPITM-/MICROWIRETMcompatible serial interface. Input data is shifted into an 8bit shift register and latched to the outputs when CS transitions from low to high. Each data bit in the shift register corresponds to a specific output, allowing independent control of all outputs. The MAX4821 features a 4-bit (A0, A1, A2, LVL) parallel-input interface. The first three bits (A0, A1, A2) determine the output address, and the fourth bit (LVL) determines whether the selected output is switched on or off. Data is latched to the outputs when CS transitions from low to high. Both devices feature separate set and reset functions that allow the user to turn on or turn off all outputs simultaneously with a single control line. Built-in hysteresis (Schmidt trigger) on all digital inputs allows this device to be used with slow rising and falling signals, such as those from optocouplers or RC power-up initialization circuits. The MAX4820/MAX4821 are available in 20-pin TSSOP and space-saving 20-pin Thin QFN packages. 8 Independent Output Channels Built-In Inductive Kickback Protection Drive +3V and +5V Relays Guaranteed 70mA (min) Coil Drive Current SET Function to Turn On All Outputs Simultaneously RESET Function to Turn Off All Outputs Simultaneously SPI-/QSPI-/MICROWIRE-Compatible Serial Interface (MAX4820) Serial Digital Output for Daisy Chaining (MAX4820) Parallel Interface (MAX4821) Low 50A (max) Quiescent Supply Current Space-Saving 20-Pin Thin QFN Package
Features
MAX4820/MAX4821
Ordering Information
PART MAX4820ETP+ MAX4820EUP+ MAX4821ETP+ TEMP RANGE -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 20 Thin QFN-EP* 20 TSSOP-EP* 20 Thin QFN-EP*
Applications
Central Office ATE
MAX4821EUP+ -40C to +85C 20 TSSOP-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad.
Pin Configurations
PGND
OUT1 18
20
19
17
E1/T1 Redundancy
RESET CS DIN
+
1 2 3 4 5
16
Industrial Equipment
OUT2
VCC
SET
DSL, ADSL Line Cards
TOP VIEW
15 14
OUT3 OUT4 COM OUT5 OUT6
Pin Configurations continued at end of data sheet. Typical Application Circuits and Functional Diagrams appear at end of data sheet.
MAX4820 *EP
10 PGND 6 7 8 9
13 12 11
SCLK DOUT
N.C.
OUT8
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
*CONNECT EP TO GND.
THIN QFN
________________________________________________________________ Maxim Integrated Products
OUT7
GND
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface MAX4820/MAX4821
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.) VCC, COM..............................................................-0.3V to +6.0V OUT_........................................................-0.3V to (VCOM + 0.3V) CS, SCLK, DIN, SET, RESET, A0, A1, A2, LVL......-0.3V to +6.0V DOUT..........................................................-0.3V to (VCC + 0.3V) Continuous OUT_ Current (all outputs turned on) ............150mA Continuous OUT_ Current (single output turned on) ........300mA Continuous Power Dissipation (TA = +70C) 20-Lead Thin QFN (derate 16.9mW/C above +70C)..1350mW JA (Note 1) ...............................................................59.3C/W 20-Pin TSSOP (derate 21.7mW/C above +70C) .....1739mW JA (Note 1) ..................................................................46C/W Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Soldering Temperature (10s) ...........................................+300C Reflow Temperature.........................................................+260C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specifications. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +3V to +5.5V, VCOM = VCC, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2)
PARAMETER Operating Voltage Quiescent Current Thermal Shutdown Power-On Reset Power-On Reset Hysteresis DIGITAL INPUTS (SCLK, DIN, CS, LVL, A0, A1, A2, RESET, SET) Input Logic-High Voltage Input Logic-Low Voltage Input Logic Hysteresis Input Leakage Currents CIN Input Capacitance DIGITAL OUTPUT (DOUT) DOUT Low Voltage DOUT High Voltage VOL VOH ISINK = 6mA ISOURCE = 0.5mA VCC = 2.7V VCC = 4.5V RON VOUT_ ILEAK VFORW VCC = 2.7V VCC = 3.0V, IOUT_ = 70mA VOUT_ = VCC, all outputs off IOUT_ = 150mA (Note 3) -1 VCC - 0.5 70 70 2 6 0.4 +1 1.5 0.4 V V VIH VIL VHYST ILEAK CIN Input voltages = 0V or 5.5V -1.0 VCC = 3.3V VCC = 5V VCC = 3.3V VCC = 5V 150 0.01 5 +1.0 2.0 2.4 0.6 0.8 V V mV A pF 0.8 SYMBOL VCC IQ IOUT_ = 0A, logic inputs = 0V or VCC VCC = 3.6V VCC = 5.5V CONDITIONS MIN 2.3 15 20 160 1.5 140 2.2 TYP MAX 5.5 50 70 UNITS V A C V mV
RELAY OUTPUT DRIVERS (OUT1-OUT8) OUT_ Drive Current OUT_ On-Resistance OUT_ Voltage IOUT Off-Leakage Current Kickback Diode Forward Voltage mA V A V
2
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3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3V to +5.5V, VCOM = VCC, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2)
PARAMETER SPI TIMING (MAX4820) Turn-On Time (OUT_) Turn-Off Time (OUT_) SCLK Frequency Cycle Time CS Fall to SCLK Rise Setup CS Rise to SCLK Hold SCLK High Time SCLK Low Time Data Setup Time Data Hold Time SCLK Fall to DOUT Valid Rise Time (DIN, SCLK, CS, SET, RESET) Fall Time (DIN, SCLK, CS, RESET, SET) RESET Min Pulse Width SET Min Pulse Width PARALLEL TIMING (MAX4821) Turn-On Time Turn-Off Time LVL Setup Time LVL Hold Time Address to CS Setup Time Address to CS Hold Time Rise Time (A2, A1, A0, LVL) Fall Time (A2, A1, A0, LVL) RESET Pulse Width SET Pulse Width tON tOFF tLS tLH tAH tAS tSCR tSCF tRW tSW 20% of VCC to 70% of VCC, CL = 50pF 20% of VCC to 70% of VCC, CL = 50pF 70 70 From rising edge of CS, RL = 50, CL = 50pF From rising edge of CS, RL = 50, CL = 50pF 100 0 100 0 2 2 1 1 s s ns ns ns ns s s ns ns tON tOFF fSCLK tCH + tCL tCSS tCSH tCH tCL tDS tDH tDO tSCR tSCF tRW tSW 50% of SCLK to 10% of DOUT, CL = 50pF 20% of VCC to 70% of VCC, CL = 50pF 20% of VCC to 70% of VCC, CL = 50pF 70 70 From rising edge of CS, RL = 50, CL = 50pF From rising edge of CS, RL = 50, CL = 50pF 0 480 240 240 190 190 100 0 85 120 2 2 1.0 1.0 2.1 s s MHz ns ns ns ns ns ns ns ns s s ns ns SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX4820/MAX4821
Note 2: Specifications at -40C are guaranteed by design and not production tested. Note 3: After relay turn-off, inductive kickback may momentarily cause the voltage at OUT_ to exceed VCOM. This is considered part of normal operation and will not damage the device.
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+3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface MAX4820/MAX4821
Typical Operating Characteristics
(VCOM = VCC, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX4820 toc01
SUPPLY CURRENT vs. TEMPERATURE
VCC = 5V 20 SUPPLY CURRENT (A) VCC = 5.5V
MAX4820 toc02
SUPPLY CURRENT vs. INPUT LOGIC VOLTAGE
900 800 SUPPLY CURRENT (A) 700 600 500 400 300 200 100 VCC = 3.3V VCC = 5V ALL LOGIC INPUTS CONNECTED
MAX4820 toc03
25 ALL LOGIC INPUTS = 0 20 SUPPLY CURRENT (A)
25
1000
15
15
10
10 VCC = 3.3V VCC = 2.3V 5
5
0 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 SUPPLY VOLTAGE (V)
0 -40 -15 10 35 60 85 TEMPERATURE (C)
0 0 1 2 3 4 5 INPUT LOGIC VOLTAGE (V)
ON-RESISTANCE vs. SUPPLY VOLTAGE
MAX4820 toc04
ON-RESISTANCE vs. TEMPERATURE
IOUT_SINK = 70mA 2.5 2.0 RON () 1.5 1.0 VCC = 5.5V 0.5 0 VCC = 5V VCC = 2.3V VCC = 3.3V
MAX4820 toc05
POWER-ON RESET VOLTAGE vs. TEMPERATURE
1.75 POWER-ON RESET VOLTAGE (V) 1.50 1.25 1.00 0.75 0.50 0.25 0 -40 -15 10 35 60 85
MAX4820 toc06
3.0 IOUT_SINK = 70mA 2.5 2.0 RON () 1.5 1.0 0.5 0 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1
3.0
2.00
5.5
-40
-15
10
35
60
85
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
TEMPERATURE (C)
OUTPUT OFF-LEAKAGE CURRENT vs. SUPPLY VOLTAGE
MAX4820 toc07
OUTPUT OFF-LEAKAGE CURRENT vs. TEMPERATURE
MAX4820 toc08
OUT_ TURN-ON/TURN-OFF DELAY TIMES vs. SUPPLY VOLTAGE
RL = 50 CL = 50pF
MAX4820 toc09
1.0 0.9 OUTPUT OFF-LEAKAGE (nA) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1
2.00 1.75 OUTPUT OFF-LEAKAGE (nA) 1.50 1.25 1.00 0.75 0.50 0.25 0 VCC = 3.3V -40 -15 10 35 60 VCC = 5V VCC = 2.3V VCC = 5.5V
80 70 tON/tOFF DELAY TIME (ns) 60 50 tOFF 40 30 20
tON 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
5.5
85
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
SUPPLY VOLTAGE (V)
4
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3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface
Typical Operating Characteristics (continued)
(VCOM = VCC, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) INPUT LOGIC THRESHOLD BACK EMF CLAMPING vs. SUPPLY VOLTAGE WITH STANDARD 3V RELAY
2.25 INPUT LOGIC THRESHOLD (V) 2.00 1.75 1.50 1.25 1.00 0.75 0.50 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 200s/div SUPPLY VOLTAGE (V) 0 OUT_ TURNS OFF VCC = 3.3V OUT_ 1V/div
MAX4820 toc10
MAX4820/MAX4821
2.50
MAX4820 toc11
0
VCS 5V/div
Pin Description
PIN MAX4820 THIN QFN 1 TSSOP MAX4821 THIN QFN 1 TSSOP Reset Input. Drive RESET low to clear all latches and registers (all outputs are turned off). RESET overrides all other inputs. If RESET and SET are pulled low at the same time, then RESET takes precedence. Chip-Select Input. MAX4820: Drive CS low to select the device. When CS is low, data at DIN is clocked into the 8-bit shift register on SCLK's rising edge. Drive CS from low to high to latch the data to the registers and activate the appropriate relays. MAX4821: Drive CS low to select the device and set level on LVL. Drive CS from low to high to latch the address and level data to the output. Serial-Data Input Serial-Clock Input Serial-Data Output. DOUT is the output of the 8-bit shift register. This output can be used to daisy chain multiple MAX4820s. The data at DOUT appears synchronous to SCLK's falling edge. No Connection Ground Open-Drain Output 8. Connect OUT8 to the low side of a relay coil. This output is pulled to PGND when activated, but otherwise is high impedance. Open-Drain Output 7. Connect OUT7 to the low side of a relay coil. This output is pulled to PGND when activated, but otherwise is high impedance. Power Ground. PGND is a return for the output sinks. Connect PGND pins together and to GND. Open-Drain Output 6. Connect OUT6 to the low side of a relay coil. This output is pulled to PGND when activated, but otherwise is high impedance. NAME FUNCTION
3
3
RESET
2
4
2
4
CS
3 4 5 6 7 8 9 10, 16 11
5 6 7 8 9 10 11 12, 18 13
-- -- -- -- 7 8 9 10, 16 11
-- -- -- -- 9 10 11 12, 18 13
DIN SCLK DOUT N.C. GND OUT8 OUT7 PGND OUT6
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5
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface MAX4820/MAX4821
Pin Description (continued)
PIN MAX4820 THIN QFN 12 TSSOP 14 MAX4821 THIN QFN 12 TSSOP 14 OUT5 Open-Drain Output 5. Connect OUT5 to the low side of a relay coil. This output is pulled to PGND when activated, but otherwise is high impedance. Common Free-Wheeling Diodes. Connect COM to VCC. COM can also be connected to a separate supply that is higher than VCC. In that case, bypass VCC to GND with a 0.1F capacitor. Open-Drain Output 4. Connect OUT4 to the low side of a relay coil. This output is pulled to PGND when activated, but otherwise is high impedance. Open-Drain Output 3. Connect OUT3 to the low side of a relay coil. This output is pulled to PGND when activated, but otherwise is high impedance. Open-Drain Output 2. Connect OUT2 to the low side of a relay coil. This output is pulled to PGND when activated, but otherwise is high impedance. Open-Drain Output 1. Connect OUT1 to the low side of a relay coil. This output is pulled to PGND when activated, but otherwise is high impedance. Input Supply Voltage. Bypass VCC to GND with a 0.1F capacitor. Set Input. Drive SET low to set all latches and registers high (all outputs are turned on). SET overrides all parallel and serial control inputs. RESET overrides SET under all conditions. Level Input. LVL determines whether the selected address is switched on or off. A logic high on LVL switches on the addressed output. A logic low on LVL switches off the addressed output. Digital Address "0" Input. (See Table 2 for address mapping.) Digital Address "1" Input. (See Table 2 for address mapping.) Digital Address "2" Input. (See Table 2 for address mapping.) Exposed Pad. Connect exposed pad to GND. NAME FUNCTION
13
15
13
15
COM
14 15 17 18 19 20
16 17 19 20 1 2
14 15 17 18 19 20
16 17 19 20 1 2
OUT4 OUT3 OUT2 OUT1 VCC SET
-- -- -- -- --
-- -- -- -- --
3 4 5 6 --
5 6 7 8 --
LVL A0 A1 A2 EP
Detailed Description
The MAX4820/MAX4821 8-channel relay drivers offer built-in kickback protection and drive +3.3V/+5V nonlatching or dual-coil-latching relays. These devices are especially useful when driving +3V relays. Each independent open-drain output features a 2 on-resistance and is guaranteed to sink 70mA (min) load current. Both devices consume less than 50A (max) quiescent current and feature 1A (min) output off-leakage current. The MAX4820 features an SPI/QSPI/MICROWIRE-compatible serial interface. Input data is shifted into an 8-bit shift register and latched to the outputs when CS transitions from low to high. Each data bit in the shift register corresponds to a specific output, allowing independent control of all outputs.
6
The MAX4821 features a 4-bit (A0, A1, A2, LVL) parallel input interface. The three bits (A0, A1, A2) determine the output address, and LVL determines whether the selected output is switched on or off. Data is latched to the outputs when CS transitions from low to high. Both devices feature separate set and reset functions that allow the user to turn on or turn off all outputs simultaneously with a single control line. Built-in hysteresis (Schmidt trigger) on all digital inputs allows this device to be used with slow rising and falling signals, such as those from optocouplers or RC power-up initialization circuits. The MAX4820/MAX4821 are available in 20-pin TSSOP and space-saving 20-pin Thin QFN packages.
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3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface MAX4820/MAX4821
CS tCSS SCLK tDH tDS DIN D7 D6 D1 tDO DOUT tON, tOFF OUT_ D0 tCL tCH tCSH tCSW tCSO
Figure 1. 3-Wire Serial-Interface Timing Diagram (MAX4820 only)
Table 1. Serial Input Address Map (MAX4820 Only)
DIN OUT_ D0 OUT1 D1 OUT2 D2 OUT3 D3 OUT4 D4 OUT5 D5 OUT6 D6 OUT7 D7 OUT8
Digital Interface
Serial Interface (MAX4820) The serial interface consists of an 8-bit shift register and parallel latch controlled by SCLK and CS. The input to the shift register is an 8-bit word. Each data bit controls one of the eight outputs, with the most significant bit (D7) corresponding to OUT8 and the least significant bit (D0) corresponding to OUT1 (see Table 1). When CS is low (device is selected), data at DIN is clocked into the shift register synchronously with SCLK's rising edge. Driving CS from low to high latches the data in the shift register to the parallel latch. DOUT is the output of the shift register. Data appears on DOUT synchronously with SCLK's falling edge and is identical to the data at DIN delayed by eight clock cycles. When shifting the input data, D7 is the first bit in and out of the shift register. While CS is low, the switches always remain in their previous state. Drive CS high after 8 bits of data have been shifted in to update the output state and inhibit further data from entering the shift register. When CS is high, transitions at DIN and SCLK have no effect on the out-
put, and the first input bit (D7) is present at DOUT. If the number of data bits entered while CS is low is greater or less than 8, the shift register contains only the last 8 data bits, regardless of when they were entered. The 3-wire serial interface is compatible with SPI, QSPI, and MICROWIRE standards. The latch that drives the analog switch is updated on the rising edge of CS, regardless of SCLK's state.
Parallel Interface (MAX4821) The parallel interface consists of three address bits (A0, A1, A2) and one level selector bit (LVL). The address bits determine which output is updated, and the level bit determines whether the addressed output is switched on (LVL = high) or off (LVL = low). When CS is high, the address and level bits have no effect on the state of the outputs. Driving CS from low to high latches the address and level data to the parallel register and updates the state of the outputs. Address data entered after CS is pulled low is not reflected in the state of the outputs following the next low-to-high transition on CS (Figure 2).
7
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+3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface MAX4820/MAX4821
Table 2. Parallel Interface Address Map (MAX4821 Only)
CS
A2 Low Low
tAS tAH
A1 Low Low High High Low Low High High
A0 Low High Low High Low High Low High
OUTPUT OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8
Low Low High
A_ tLH tLS LVL
High High High
SET/RESET Functions
tON, tOFF VOUT
The MAX4820/MAX4821 feature set and reset inputs that allow the user to simultaneously turn all outputs on or off using a single control line. Drive SET low to set all latches and registers to 1 and turn all outputs on. SET overrides all serial/parallel control inputs. Drive RESET low to clear all latches and registers and turn all outputs off. RESET overrides all other inputs, including SET.
Figure 2. Parallel Interface Timing Diagram (MAX4821 only)
Applications Information
Daisy Chaining
The MAX4820 features a digital output, DOUT, that provides a simple way to daisy chain multiple devices. This feature allows the user to drive large banks of relays using only a single serial interface. To daisy chain multiple devices, connect all CS pins together, and connect the DOUT of one device to the DIN of another device (see Figure 3). During operation, a stream of serial data
VCC
0.1F
VCC
0.1F
VCC
0.1F
VCC DIN DIN DOUT DIN
VCC DOUT DIN
VCC DOUT
MAX4820 OUT1
SCLK SCLK CS GND SCLK SCLK CS
MAX4820 OUT1
SCLK SCLK CS
MAX4820 OUT1
OUT8 PGND
OUT8 GND PGND
OUT8 GND PGND
CS
Figure 3. Daisy-Chain Configuration
8 _______________________________________________________________________________________
3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface
is shifted through all the MAX4820s in series. When CS goes high, all outputs update simultaneously. The MAX4820 can also be used in a slave configuration that allows the user to address individual devices. Connect all the DIN pins together, and use the CS input to address one device at a time. Drive CS low to select a slave and input the data into the shift register. Drive CS high to latch the data and turn on the appropriate outputs. Typically, in this configuration only one slave is addressed at a time.
Inductive Kickback Protection
The MAX4820/MAX4821 feature built-in inductive kickback protection to reduce the voltage spike on OUT_ generated by a relay's coil inductance when the output is suddenly switched off. Internal diodes connected from each output to COM allow the inductor current to flow back to the supply. Connect the common cathode (COM) of the internal protection diodes to VCC. COM also can be connected to a higher voltage than VCC (+6V max) for faster kickback recovery. In this configuration, bypass COM to PGND with a 0.1F capacitor.
MAX4820/MAX4821
Relay Manufacturers
COMPANY Aromat Corp. CP Clare Corp. Coto Techonology Deustch Relays, Inc. Fujitsu Takamisawa Hella KG Hueck PHONE WEBSITE COMPANY NEC Electronics, Inc. Omron Electronics, Inc. Rockwell/AllenBradley Siemens Electromechanical Component, Inc. Teledyne Relays PHONE WEBSITE 310-524-9862 www.aromat.com 978-524-6700 www.crouzet.com 401-943-2686 www.cotorelay.com 516-499-6000 www.deutschrelays.com 408-745-4900 www.fujitsufta.com 734-414-0970 www.hella.com 770-371-3000 www.sec.siemens.com 213-777-0077 www.teledynerelays.com
800-366-9782 www.nec-global.com 847-843-7900 www.oeiweb.omron.com 414-382-2000 www.ab.com
Typical Application Circuits
0.1F VCC 0.1F RELAY COIL 1 RESET SET A0 CLK CS A2 DIN DOUT GND OUT8 PGND RELAY COIL 8 CS LVL GND OUT8 PGND RELAY COIL 8 VCC
VCC RESET SET
COM OUT1
VCC
COM OUT1
RELAY COIL 1
MAX4820
VCC A1
MAX4821
VCC
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9
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface MAX4820/MAX4821
Functional Diagrams
COM
VCC
MAX4820
OUT1 OUT2 OUT3 OUT4
RESET SET
DIN 8-BIT SHIFT REGISTER
PARALLEL REGISTER
OUT5 OUT6 OUT7 OUT8
DOUT
SCLK
CS GND PGND
COM
VCC
MAX4821
OUT1 OUT2 OUT3 OUT4
RESET SET
LVL A2 A1 A0
PARALLEL LATCH 4-TO-8 DECODER
OUT5 OUT6 OUT7 OUT8
CS GND PGND
10
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3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface
Pin Configurations (continued)
TOP VIEW
PGND
MAX4820/MAX4821
OUT1
OUT2
VCC
SET
+
VCC 1 SET 2 RESET 3 20 OUT1 19 OUT2 18 PGND 17 OUT3 VCC 1 SET 2 RESET 3 CS 4 LVL 5 A0 6 A1 7 A2 8 GND 9 OUT8 10
+
20 OUT1 19 OUT2 18 PGND 17 OUT3
20
19
18
17
+
RESET CS LVL A0 A1 1 2 3 4 5
16 15 14
OUT3 OUT4 COM OUT5 OUT6
CS 4 DIN 5 SCLK 6 DOUT 7 N.C. 8 GND 9 OUT8 10
MAX4820
16 OUT4 15 COM 14 OUT5 13 OUT6 12 PGND
MAX4821
16 OUT4 15 COM 14 OUT5 13 OUT6 12 PGND
MAX4821 *EP
10 6 7 8 9
13 12 11
A2
OUT8
OUT7
GND
THIN QFN
*CONNECT EP TO GND.
PGND
*EP TSSOP
11 OUT7
*EP TSSOP
11 OUT7
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 20 TQFN-EP 20 TSSOP-EP PACKAGE CODE T2044+3 U20E+1 DOCUMENT NO. 21-0139 21-0108
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+3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface MAX4820/MAX4821
Revision History
REVISION NUMBER 0 1 REVISION DATE 1/03 4/09 Initial release. Corrected error in the Electrical Characteristics table. Added exposed pad to TSSOP package in the Ordering Information, Pin Description, and Pin Configurations. Added Reflow Temperature to the Absolute Maximum Ratings section. DESCRIPTION PAGES CHANGED -- 1, 2, 3, 5, 11, 12, 13 1, 6, 11 2
2
1/10
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

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